Application of porous silicon to bulk silicon micromachining

dc.contributor.author	Καλτσάς, Γρηγόριος	el
dc.contributor.author	Νασιοπούλου, Ανδρούλα Γ.	el
dc.date.accessioned	2015-06-02T15:20:12Z
dc.date.issued	2015-06-02
dc.identifier.uri	http://hdl.handle.net/11400/14868
dc.rights	Αναφορά Δημιουργού-Μη Εμπορική Χρήση-Όχι Παράγωγα Έργα 3.0 Ηνωμένες Πολιτείες	*
dc.rights.uri	http://creativecommons.org/licenses/by-nc-nd/3.0/us/	*
dc.source	http://www.mrs.org/	en
dc.subject	Crystal microstructure
dc.subject	Membranes
dc.subject	Porous silicon
dc.subject	Πορώδες πυρίτιο
dc.subject	Μεμβράνες
dc.subject	Κρυστάλλινη μικροδομή
dc.title	Application of porous silicon to bulk silicon micromachining	en
heal.type	conferenceItem
heal.classification	Technology
heal.classification	Electrical engineering
heal.classification	Τεχνολογία
heal.classification	Ηλεκτρολογία Μηχανολογία
heal.classificationURI	http://id.loc.gov/authorities/subjects/sh85133147
heal.classificationURI	http://zbw.eu/stw/descriptor/18426-4
heal.classificationURI	N/A-Τεχνολογία
heal.classificationURI	N/A-Ηλεκτρολογία Μηχανολογία
heal.keywordURI	http://id.loc.gov/authorities/subjects/sh95003725
heal.identifier.secondary	DOI: http://dx.doi.org/10.1557/PROC-459-249
heal.dateAvailable	10000-01-01
heal.language	en
heal.access	forever
heal.publicationDate	1997
heal.bibliographicCitation	Kaltsas, G. & Nassiopoulou, A.G. (1997) Application of porous silicon to bulk silicon micromachining, In: Proceedings of the 1996 Materials Research Society Fall Symposium. Boston, MA, USA. 2-5 December, 1996. [online] 459. p. 249-254. Available from: http://www.mrs.org/	en
heal.abstract	A fully C-MOS compatible process for bulk silicon micromachining using porous silicon technology and front-side lithography is developed. The process is based on the use of porous silicon as a sacrificial layer for the fabrication of deep cavities into monocrystalline silicon, so as to avoid back side lithography. Cavities as deep as several hundreds of micrometers are produced with very smooth surface and sidewalls. The process is used to produce : a) suspended monocrystalline silicon membranes, b) free standing polysilicon membranes in the form of bridges or cantilevers with lateral dimensions from a few μms to several hundreds of μms. Important applications to silicon integrated devices as sensors, actuators, detectors etc., are foreseen.	en
heal.publisher	Materials Research Society	en
heal.fullTextAvailability	false
heal.conferenceName	1996 MRS Fall Symposium	en
heal.conferenceItemType	poster