dc.contributor.author | Noorbasha, Fazal | en |
dc.contributor.author | Verma, Ashish | en |
dc.contributor.author | Mahajan, A.M. | en |
dc.date.accessioned | 2015-01-29T09:44:36Z | |
dc.date.available | 2015-01-29T09:44:36Z | |
dc.date.issued | 2015-01-29 | |
dc.identifier.uri | http://hdl.handle.net/11400/5021 | |
dc.rights | Αναφορά Δημιουργού-Μη Εμπορική Χρήση-Όχι Παράγωγα Έργα 3.0 Ηνωμένες Πολιτείες | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/3.0/us/ | * |
dc.source | http://e-jst.teiath.gr/ | en |
dc.subject | Inverter | |
dc.subject | Αντιστροφέας | |
dc.subject | Low power | |
dc.subject | High speed | |
dc.subject | CMOS | |
dc.subject | 90nm technology | |
dc.subject | Χαμηλή ισχύς | |
dc.subject | Υψηλή ταχύτητα | |
dc.subject | Τεχνολογία 90nm | |
dc.title | Study the analysis of low power and high speed CMOS logic circuits in 90nm technology | en |
heal.type | journalArticle | |
heal.classification | Technology | |
heal.classification | Electronics | |
heal.classification | Τεχνολογία | |
heal.classification | Ηλεκτρονική | |
heal.classificationURI | http://id.loc.gov/authorities/subjects/sh85133147 | |
heal.classificationURI | http://zbw.eu/stw/descriptor/10455-2 | |
heal.classificationURI | **N/A**-Τεχνολογία | |
heal.classificationURI | **N/A**-Ηλεκτρονική | |
heal.language | en | |
heal.access | free | |
heal.publicationDate | 2010 | |
heal.bibliographicCitation | Noorbasha, F., Verma, A. and Mahajan, A.M. (2010). Study the analysis of low power and high speed CMOS logic circuits in 90nm technology. "e-Journal of Science & Technology". [Online] 5(1): 43-50. Available from: http://e-jst.teiath.gr/ | en |
heal.abstract | This paper describes the parameter and characteristic analysis of Low power and High speed CMOS Logic Circuits in 90nm Technology. The proposed CMOS logic circuits consists only logic gates. CMOS circuit is fabricated in 0.12µm and 90nm CMOS technology. The supply voltage is 1.20V. The temperature was 27ºC. We observed Inverter (NOT gate) properties - MOS, Capacitance, Resistance, Inductance and Clock. These layouts can store in the form of semi-custom library to make full-custom SoC designs. | en |
heal.publisher | Νερατζής, Ηλίας | el |
heal.publisher | Σιανούδης, Ιωάννης | el |
heal.journalName | e-Journal of Science & Technology | en |
heal.journalName | e-Περιοδικό Επιστήμης & Τεχνολογίας | el |
heal.journalType | peer-reviewed | |
heal.fullTextAvailability | true |
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